The present invention relates to the art of microelectronic packaging and more particularly relates to packaged semiconductor chip assemblies suitable for mounting on substrates such as circuit panels, and to methods of making and using such assemblies.
Semiconductor chips commonly are connected to other elements of an electronic device by mounting the chip on a substrate such as a circuit panel having electrical conductors extending along its surfaces or within the substrate structure. In some cases, the chip is mounted in a package having external conductive elements such as leads or pins protruding from the package. A socket may be mounted to the substrate and the external leads or pins of the chip package may be received in the socket. In other arrangements, the chip package may have solderable contacts on a surface of the package, and may be mounted directly to the substrate by soldering techniques commonly referred to as surface mount technology. In these soldering techniques, each contact on the package directly abuts a contact pad on the substrate, and is bonded thereto by solder masses carried on the package or on the substrate. In other techniques, a bare unpackaged chip can be placed directly on the circuit panel and connected to the electrical conductors of the panel by techniques such as wire bonding, tape automated bonding (TAB), or flip-chip bonding. In flip-chip bonding, the front surface of the chip faces downwardly toward the surface of the substrate, and contacts on the front surface of the chip are directly bonded to contact pads on the substrate surface, as by solder disposed between the contacts and pads. The entire assembly is then packaged, as by encapsulating or partially encapsulating the substrate and chip.
In many cases, it is desirable to provide a metal cap covering the chip, the chip being bonded to the substrate. Such a cap can serve as a thermal spreader, and can conduct heat generated by the chip during operation away from the chip. For example, in a flip chip arrangement, the cap may provide a thermal path from a rear surface of the chip, facing away from the panel, to the circuit panel. The metal cap may also provide an electrical interconnection to the rear surface, as where the rear surface is used as a ground or power connection. Also, the cap can provide additional mechanical protection and additional electrical shielding around the chip. Typically, such caps have been added in separate operations after the chip is mounted on a circuit panel, which have required additional steps beyond those needed to mount the chip. Moreover, the metal caps and other components used in attaching the metal caps to the chips and circuit panels must be stocked and handled separately. All of this adds cost and complexity to the circuit panel manufacturing process. Accordingly, there have been needs prior to the present invention for improved chip assembly procedures which avoid the need for separate handling of the metal cap during assembly of the circuit panel, and there have been corresponding needs for prepackaged chip assemblies which can be utilized in such simplified procedures, as well as needs for methods of making such chip assemblies.
The present invention addresses these needs.
One aspect of the present invention provides a packaged semiconductor chip assembly for mounting on a substrate. The assembly according to this aspect of the invention includes a metallic cap defining a rear wall, at least one side wall projecting forwardly from the rear wall and at least one flange projecting from the side wall at a forward edge thereof remote from the rear wall. At least part of the cap is flexible so that the flange or flanges is or are movable with respect to the rear wall. Most preferably, the metallic cap is formed from a unitary piece of bent sheet metal. The assembly further includes one or more semiconductor chips. Each chip has a rear surface bonded to the rear wall of the cap and a front surface facing forwardly away from the rear wall. Most preferably, the rear wall of the cap is rectangular, and has side walls and flanges on two opposed sides or on four sides, so that the rear wall and side walls cooperatively define a u-shaped or box-shaped enclosure and the chip or chips are received in this enclosure.
The assembly further includes chip bonding contacts overlying the front surface of each chip and electrically connected to the chip. The chip bonding contacts may be provided on the front surface of the chip itself, or else may be provided on an interposer, such as a flexible, sheet-like dielectric element overlying the front surface of the chip. The flange or flanges also have bonding contacts thereon. The chip bonding contacts and the flange bonding contacts may be metallic contacts adapted for bonding to metallic contacts on the substrate. Most preferably, the chip bonding contacts and the flange bonding contacts are solderable contacts. The flange bonding contacts may be formed as portions of the flange itself, i.e., as exposed solderable metal areas on the flange surface adapted to be wet by the solder. The chip bonding contacts and flange bonding contacts may also include solder masses. Some or all of the solder masses may be solid core solder balls, incorporating cores of high-melting materials.
Preferably, the flange bonding contacts are coplanar with the chip bonding contacts in at least one position of the flange or flanges. Thus, when the metallic cap is in an undeformed condition, the flange bonding contacts may be exactly coplanar with the chip bonding contacts, or else may stand slightly forward or slightly rearwardly of the chip bonding contacts. However, any deviation from precise coplanarity in the undeformed condition desirably is minor, so that the flange bonding contacts and chip bonding contacts can be made coplanar during the assembly process as discussed below by minor deformation of the cap. Most preferably, the assembly includes a flexible potting compound surrounding the chip but not coating the contacts.
In a mounting procedure according to a further aspect of the present invention, an assembly such as the assemblies discussed above is engaged with a face of a substrate so that both the flange contacts and the chip contacts engage the substrate. The method further includes the step of bonding the flange contacts and the chip contacts to the substrate. Most preferably, the bonding step is performed so as to bond the flange contacts and chip contacts to the substrate simultaneously, as by providing molten solder at the interface between the flange contacts and the substrate and at the interface between the chip contacts and the substrate and cooling the assembly to resolidify the solder while maintaining the flange contacts and the chip contacts in engagement with the substrate. The molten solder may be provided by melting solder in masses of solder provided either on the substrate or on the contacts. The substrate may be a conventional, generally planar substrate such as a circuit board or other circuit panel.
The packaged chip subassembly can be handled as a unit, using substantially the same techniques as are common in conventional surface mounting operations. The same operations used to mount the chip itself also serve to mount the metallic cap and to form the interconnections needed for thermal and/or electrical interconnection of the cap with the substrate. The entire packaged chip assembly can be stocked, handled and placed as a unit. Moreover, the cap provides some mechanical protection to the chip both before and after mounting the assembly to the circuit panel.
The flexibility of the cap allows the cap to accommodate thermally generated stresses during mounting as further discussed below and also allows the cap to compensate for thermal expansion and contraction of the components during use.
A further aspect of the present invention provides methods for making chip assemblies such as those discussed above. The preferred method according to this aspect of the present invention includes the step of providing a metallic element having one or more rear regions and one or more flange regions offset from the rear regions in a forward direction. A plurality of semiconductor chips are placed into the one or more rear regions in front face forward disposition so that the rear face of each chip overlies a rear region of the metallic element and so that the front face of the chip faces away from the metallic element. The rear face of each chip is attached to a rear region of the metallic element, as by a thermally conductive adhesive disposed between the rear face of the chip and the rear region. Bondable flange contacts are provided on the flange regions of the metallic element, whereas bondable chip contacts are provided overlying the front face of each chip. After the placing and attaching steps, the metallic element is severed to form a plurality of chip package assemblies. Each assembly includes a metallic cap having a rear wall, having one or more flanges with flange contacts thereon. Each assembly also includes at least one chip attached to the rear wall of the cap and chip contacts overlying the face of each such chip. The step of providing chip contacts and flange contacts may include the step of placing solder masses on the chip and on the flange. Also, the method may include the step of providing a flexible potting compound surrounding the chips before the severing step, so that the potting compound does not cover the contacts of the finished assemblies. This process provides an economical method of manufacturing the chip assemblies.